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ADE7754
Measurement Mode Register (0Bh)
The configuration of the period and peak measurements made by the ADE7754 are defined by writing to the MMODE register.
Table XII summarizes the functionality of each bit in the MMODE register.
Table XII. MMODE Register
Bit
Bit
Default
Location
0-1
Mnemonic
PERDSEL
Value
0
Description
These bits are used to select the source of the measurement of the voltage line period.
Bit 1 Bit 0 Source
0 0
0 1
1 0
1 1
Phase A
Phase B
Phase C
Reserved
2-3
PEAKSEL
0
These bits select the line voltage and current phase used for the PEAK detection. If the
selected line voltage is above the level defined in the PKVLVL register, the PKV flag in the
interrupt status register is set. If the selected current input is above the level defined in the
PKILVL register, the PKI flag in the interrupt status register is set.
Bit 3 Bit 2 Source
0 0
0 1
1 0
1 1
Phase A
Phase B
Phase C
Reserved
4-6
ZXSEL
7
These bits select the phases used for counting the number of zero crossing in the line active
and apparent accumulation modes as well as enabling these phases for the zero-crossing
timeout detection, zero crossing, period measurement, and SAG detection. Bits 4, 5, and 6
select Phase A, Phase B, and Phase C, respectively.
7
Reserved.
Waveform Mode Register (0Ch)
The waveform sampling mode of the ADE7754 is defined by writing to the WAVMODE register. Table XIII summarizes the func-
tionality of each bit in the WAVMODE register.
Table XIII. WAVMODE Register
Bit
Bit
Default
Location
0-2
Mnemonic
WAVSEL
Value
0
Description
These bits are used to select the source of the waveform sample.
Bit 2 Bit 1 Bit 0 Source
0
0
0
0
1
1
0 0 Voltage Phase A
0 1 Voltage Phase B
1 0 Voltage Phase C
1 1 Current Phase A
0 0 Current Phase B
0 1 Current Phase C
1 1
0 or 1 Reserved
3-4
DTRT
0
These bits are used to select the waveform sampling update rate.
Bit 4 Bit 3 Update Rate
0 0
0 1
1 0
1 1
26.0 kSPS (CLKIN/3/128)
13.0 kSPS (CLKIN/3/256)
6.5 kSPS (CLKIN/3/512)
3.3 kSPS (CLKIN/3/1024)
5
LVARSEL
0
This bit is used to enable the accumulation of the line VAR energy into the LAENERGY register
and of the line active energy into the LVAENERGY register.
REV. 0
–37 –
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